2nm

Backside power delivery moves the power grid below the transistors. What it changes in floorplanning, PDN, placement, CTS, routing, IR/EM and thermal signoff, with a practical checklist.

TSMC reported on its first-quarter earnings call that it is advancing the development of its next-generation process node. The semiconductor giant plans to put its first 3nm processes into production later this year and 2nm by the end of 2025. Goldman Sachs analyst Bruce Lee asked TSMC CEO C.C. Wei the first and second questions […]

Just a few days after Intel expressed optimism about regaining its lead in process technology by 2025, TSMC issued a statement that questioned the possibility. Competition in the semiconductor industry is heating up and even leading to strange partnerships. Intel will manufacture chips for Qualcomm, while TSMC is racing to beat Samsung on the road […]

Taiwan’s Ministry of Science and Technology discussed environmental issues surrounding the expansion of TSMC’s Hsinchu business to accommodate 2 nanometer fabs. The details of the online meeting were reported by Taiwan Commercial Daily. The second phase of the Hsinchu Science Park Baoshan Land Expansion Project is considering providing environmental impact and mitigation activities for the […]